Tag: verilog Verilog Programs Have Stream Semantics (Verilog basics 2) by Gus Smith (22 July 2024) Verilog Programs are Pure Expressions (Verilog basics 1) by Gus Smith (19 February 2024) Archive keyword: accessibility keyword: automated-testing keyword: code-formatting keyword: compiler keyword: coq keyword: design keyword: differential-equation keyword: dragon-curves keyword: fabrication keyword: floating-point keyword: induction keyword: l-systems keyword: oracle-generation keyword: outreach keyword: polynomial keyword: pretty-printing keyword: rocq keyword: security keyword: side-channels keyword: space keyword: synthesis keyword: testing keyword: time keyword: undergraduate-pl keyword: weaving keyword: website keyword: compilers keyword: computer-algebra keyword: education keyword: equality-saturation keyword: knitting keyword: pluggable-types keyword: program-optimization keyword: proof-assistant keyword: type-checking keyword: type-inference keyword: verification keyword: verilog keyword: hardware