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Doing research at PLSE as an undergraduate

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Do you wonder what it’s like to do research at PLSE? If you are a student without prior research experience, the PLSE lab may seem intimidating at first. However, PLSE supports a diverse body of undergraduates working on various research topics, from software engineering questions like “How good is a test suite” all the way to compilers for hardware. Our undergrads play an integral part in the PLSE community, growing with the lab and constantly making PLSE a better place.

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Designing a Data Reproduction Artifact

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I recently submitted a data reproduction artifact accompanying our paper “Verifying the Option Type with Rely-Guarantee Reasoning.” There are things that I wish I had done from the get-go next time, so I’m writing them down in this post. Hopefully, you’ll find some of the things I write here useful in creating your own data artifacts!

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Understanding Curry-Howard through Rocq

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Before I ever started my PhD, I could have recited to you the Curry-Howard Isomorphism: proofs are programs, and programs are proofs. But it was only when I started working on proof compilation in the interactive theorem prover Rocq (formerly known as Coq) that I feel that I truly understood it – along with why it works, why theorem provers work, and all sorts of cool tricks and connections you can use.

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Theorem Proving with Differential Equations

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Once UW kicks off the school year at the end of this month, I’ll officially be a second-year PhD student It’s a scary, yet exciting, thought! There will be loads of new incoming students, interesting research, and many surprises in store! This is also the perfect time to think critically about my goals in the PhD. One of them is building a larger theme for my research. I’m not committing to a thesis topic here. Rather, I’m searching for a concise, ideally pithy, way to describe my research. This blog post is a trial run for one theme: Real Analysis through the lens of Programming Languages.

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Working with Equivalent Definitions in Rocq

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This summer, I’ve been interning at Sandia National Labs, working on extending CompCert for concurrent programs. We represent program states as a list of threads t :: ts and a memory state m. Much of my work relates to trying to formalize safety properties of the memory state as the program steps. This is my first time using Rocq outside of CSE 505, so I thought it would be interesting to write up some reflections on the experience.

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Improving our website's accessibility with static analysis + CI

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Over the past year (and … mostly right before this post was published), I’ve been working with our wonderful website chair Yihong to make small web accessibility improvements to the PLSE website. I wanted to spend a bit of time writing up what we’ve done for a couple of reasons, which will coincidentally also sketch out the structure of this post:

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Verilog Programs Have Stream Semantics (Verilog basics 2)

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When discussing programming languages, there are often two axes that we care about: syntax and semantics. In my first post about Verilog, I discussed the interesting points of Verilog's syntax. This post will discuss Verilog semantics. Specifically, whereas the first post covered the basics of structural Verilog, this post will introduce the basics of behavioral Verilog.

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Exploring In-Synthesis Verification of Hardware

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Getting hardware right is crucial – without correct hardware, there’s no way to guarantee that software will work as intended. To raise the stakes even higher, hardware designers really only have one shot to get it right – once the hardware’s made, you can’t really patch it! To address this importance, there are many tools which use formal methods to give strong guarantees that hardware is correct. In practice, this often entails writing equivalence proofs showing that hardware behaves the same as some high-level model. In this post, we’ll take a look at the challenges I ran into while making Gator, a project I worked on which explored how to make these proofs easier!

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