A Fast Causal Profiler for Task Parallel Programs
October 10, 2017 at 12:00pm (lunch talk)
Task parallelism is an effective approach to write performance portable code. Task parallel programming models address the problem of load imbalance with the help of a work-stealing runtime. However, a task parallel program can still exhibit low parallelism due to multiple factors: coarse-grained tasks, limited work performed by the program, and secondary effects of execution such as contention, low locality, and false sharing.
This talk will describe TaskProf, a new multi-core aware profiler developed in my research group for identifying parallelism bottlenecks in task parallel programs. TaskProf constructs an accurate performance model by leveraging the structure of the execution and by using hardware performance counters to perform fine-grained measurements. This performance model enables users to perform causal profiling, i.e, estimate improvements in parallelism when a region of code is optimized even when concrete optimizations are not yet known. We have used TaskProf to identify parallelism bottlenecks in numerous Intel TBB applications. Our user study indicates that developers are able to isolate performance bottlenecks with ease using TaskProf. I will conclude the talk by providing an overview of other active projects in my group on lightweight formal tools for LLVM verification, verification of crypto code, and programming abstractions for reconfigurable architectures.
Santosh Nagarakatte is an Assistant Professor of Computer Science at Rutgers University. He obtained his PhD from the University of Pennsylvania in 2012. His research interests are in Hardware-Software Interfaces spanning Programming Languages, Compilers, Software Engineering, and Computer Architecture. His papers have been selected as IEEE MICRO TOP Picks papers of computer architecture conferences in 2010 and 2013. He has received the NSF CAREER Award in 2015, ACM SIGPLAN PLDI 2015 Distinguished Paper Award, and ACM SIGSOFT ICSE 2016 Distinguished Paper Award for his research on LLVM compiler verification. His papers have also been selected as the 2016 SIGPLAN Research Highlights Paper and 2017 Communication of the ACM Research Highlights Paper.